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Structure Department of Information Engineering
Telephone 0498277696
Qualification Ricercatore universitario confermato
Scientific sector ING-INF/01 - ELECTRONICS
University telephone book  Show

Office hours
Studio del docente (Stanza 125 - DEI/A) Si riceve su appuntamento. Contattare via email il docente per fissare un incontro.
(updated on 06/03/2017 13:47)

Curriculum Vitae
Daniele Vogrig graduated in Electronic Engineering at the University of Padua in 2001 with a thesis in 'Designing an analog turbo decoder with 0.18 um CMOS technology for magnetic disk reading channels' in collaboration with the Polytechnic of Turin (Italy) and STMicroelettronics.
In 2002 he start his PhD in Electronic Engineering and Telecommunications at the University of Padua, ended in 2005 with a thesis entitled "Analog decoders in CMOS technology: design optimization and application to UMTS". In the same year he won a research grant and in 2006 he became an assistant professor the Department of Information Engineering of the University of Padua.
He is currently involved in the Microelectronic group and his main research topics are focusing on the design of analog circuits in CMOS technology. At first, his research was about analogical decoding: the focus was the investigation about on the possibility of implementing simple and efficient analog circuits with arithmetic operations in order to use them in the field of error correction. Different CMOS integrated circuits have been developed: the first one implement a decoder for the magnetic channel of the hard-disk; the second, realized and tested, was a UMTS turbo decoder (the first analogue decoder for a commercial application). Finally, the third chip implement an iterative analog decoder, like in typical digital realizations.
He was also involved in the design of Impulse-radio UWB for short-range transmissions with high energy efficiency (wireless sensor networks). Regarding this activity, different integrated circuits have been implemented, all in CMOS technology. In one of these, he have completely designed and integrated a programmable digital core to manage the synchronization phases of the transmission.
Recently, he was involved in an INFN project to create rad-hard analog IP blocks. He started the design of a PLL based on 5GHz LC tank with programmable lock frequency with a 500 Mrad total-ionizing-dose tolerance.
He also have a basic knowledge of digital design: he use regularly programmable logic (FPGA) for testing setup and for small collaboration with other research group; in some cases, he have also developed small digital integrated circuits for inclusion in mixed-mode ASICs.
His teaching activity started in 2004. From 2004 to 2007 he was professor of "Digital Electronics"; from 2007 to 2010 he taught "Digital Electronics Laboratory" course; actually he is professor of "Digital systems electronics" and "Design and synthesis of Digital Circuits". He was supervisor for several Bachelor and Master thesis.

List of taught course units in A.Y. 2019/20
Degree course code (?) Degree course track Course unit code Course unit name Credits Year Period Lang. Teacher in charge
IN0520 COMMON INN1030318 6 2nd Year (2019/20) Second
IN0507 COMMON INL1001826 9 2nd Year (2019/20) Second